Regviz

Silicon Labs /EFR32MG21A020F768IM32 /RAC_S /RFPATHEN2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RFPATHEN2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/BGM210LA22JNF/RAC_NS/RFPATHEN2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disable)LNAMIXEN0DBMPA2 0 (disable)LNAMIXEN2 0 (disable)LNAMIXRFATTDCEN2 0 (disable)LNAMIXRFPKDENRF2 0 (disable)LNAMIXTRSW2 0 (disable)PAENANT2 0 (disable)PAENPA20DBM 0 (disable)PAENPAPREDRV20DBM

LNAMIXEN0DBMPA2=disable, LNAMIXEN2=disable, LNAMIXRFATTDCEN2=disable, PAENPA20DBM=disable, PAENPAPREDRV20DBM=disable, PAENANT2=disable, LNAMIXRFPKDENRF2=disable, LNAMIXTRSW2=disable

Description

No Description

Fields

LNAMIXEN0DBMPA2

LNAMIXEN0DBMPA2

0 (disable): undefined

1 (enable): undefined
LNAMIXEN2

LNAMIXEN2

0 (disable): undefined

1 (enable): undefined
LNAMIXRFATTDCEN2

LNAMIXRFATTDCEN2

0 (disable): undefined

1 (enable): undefined
LNAMIXRFPKDENRF2

LNAMIXRFPKDENRF2

0 (disable): undefined

1 (enable_path2): undefined
LNAMIXTRSW2

LNAMIXTRSW2

0 (disable): undefined

1 (enable): undefined
PAENANT2

PAENANT2

0 (disable): undefined

1 (enable): undefined
PAENPA20DBM

PAENPA20DBM

0 (disable): undefined

1 (enable): undefined
PAENPAPREDRV20DBM

PAENPAPREDRV20DBM

0 (disable): undefined

1 (enable): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data